PROLITH™ X6 is a lithography and patterning simulation solution that uses advanced models to quickly and accurately simulate how designs will print on the wafer. This computational lithography tool is used by IC, LED and MEMS manufacturers, scanner companies, track companies, mask manufacturers, material providers and research consortia to cost-effectively evaluate patterning technologies. This includes EUV, multiple patterning (e.g. litho-etch-litho-etch (LELE) and Self-Aligned Strategies), as well as the other standard technologies. As a critically important modeling tool for all patterning processes, PROLITH X6 helps lithographers expand their areas of research while significantly reducing the time required to identify workable solutions.
PROLITH X6 enhances the microlithography simulation experience by providing unique advanced functionalities such as the ability to simulate stochastic effects (line-edge roughness and local CD uniformity) and generate synthetic SEM images for better matching to experimental data. By incorporating the capabilities provided in previous versions of PROLITH and building on 30 years of experience, PROLITH X6 helps researchers address lithography challenges. In addition to simple dry single exposure optical lithography, features have been added to allow simulations of more complex techniques, such as immersion exposure, spacer-based SADP/SAQP (Self-Aligned Double/Quadruple Patterning) and EUV.
Advanced Lithography Technologies: When developing lithography processes for 1Xnm and below design nodes, researchers need to evaluate EUV lithography, multiple patterning lithography and creative single patterning lithography technologies. They must understand how pattern printing is affected by lithography variables, such as mask sets, scanner parameters and resist materials. The traditional method of evaluating these lithography technologies - printing hundreds of test wafers using experimental materials and prototype process equipment - would be complex, expensive, and time consuming. PROLITH acts as a lithography simulation tool, providing researchers with affordable means for modeling different lithography technologies and reducing the development time for their most advanced devices.
Wafer Topography: Wafer topography is an important consideration when implementing multiple patterning processes in the lithography cell. The first-pass resist patterns in DPL (Double Patterning Lithography) contort the imaging materials coated over them, resulting in non-planar resist surfaces for second-pass patterning. The PROLITH X6 microlithography simulation tool includes enhanced wafer topography models and improved ease-of-use for the set-up of non-planar resist profiles. These enable lithographers to more accurately predict the outcome of DPL processes and allow the simulation of next-generation non-planar devices like FinFETs and other non-planar, real-world wafer stacks (e.g. STI layers, implant layers, damascene structures). The PROLITH X6 lithography simulation tool also introduces new metrics for calculating reflectivity in the presence of wafer topography. This metric can be useful in film-stack optimization for lithography processes.