The µLoop methodology isolates electrical defects quickly and accurately by utilizing a proprietary test chip design, KLA-Tencor's eS3x e-beam inspectors and an integrated defect characterization and analysis system. For certain logic and flash devices, the µLoop methodology can isolate subtle electrical defects without the use of the test chip. By combining non-contact electrical test with inline physical defect inspection, µLoop enables faster root-cause analysis and facilitates accelerated yield learning for both FEOL and BEOL processes.

• Achieves full wafer-area inspection at highest sensitivity in under an hour, with low nuisance rate and superior defect localization
• Reduces electrical yield-learning cycles for next-generation chips from months and weeks to days, speeding time to results
• Enables accelerated production ramps and time to market, allowing chipmakers to capture higher average selling prices
• Delivers enhanced root-cause correlation and allows fabs to spend more time on problem correction and less time on problem isolation
• Features patented test chips and customized test structures that enable fabs to conduct electrical-defect inspections in minutes
• Enables non-contact probing, which allows a single wafer to be used through all layers and eliminates the risk of contamination

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