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Lithography GlossaryWritten by Chris Mack A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z
Mask Example: Reduction projection printing significantly eases the burden of producing an acceptable mask compared to 1X lithography. Mask Aligner Example: The far superior throughput of mask aligners over direct write lithography tools has made them the tools of choice for semiconductor manufacturing. Mask Biasing Example: Although mask biasing complicates the design and mask making process, the improvement in linewidth control that results could well be worth the effort. Mask Blank Example: The use of attenuated phase shifting masks greatly increases the cost of the mask blank. Mask Error Enhancement Factor Example: Although a linear imaging system produces a mask error enhancement factor of 1.0, near the resolution limit the MEEF often rises dramatically. Mask Error Factor Maskless Lithography Example: For low volume IC manufacturing, maskless lithography could offer a compelling cost of ownership advantage. Mask Linearity Example: Mask linearity is often used as a measure of the practical resolution of a process. Mercury Arc Lamp Example: The mercury arc lamp is the most common light source for optical lithography when the required resolution is greater than about 300nm. MEEF MEF Metrology Example: Determination of practical linewidth control requirements must include metrology errors as well as process errors. Microlithography Example: Microlithography techniques are used extensively in semiconductor manufacturing as well as in compact disc mastering, thin film head production, and many other advanced technologies. Mix-and-Match Lithography Example: The use of mix-and-match lithography allows for reduced equipment and process costs at the expense of more complicated overlay requirements. Modeling Moore's Law Example: By assuming that Moore's Law will continue to hold in the future, lithographic requirements can be predicted. Multilayer Resist (MLR) Example: The need for a very thin imaging layer can be met using a mutilayer resist scheme. A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z
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