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KLA-Tencor Unlocks Chipmakers' Potential To Speed Time To Market And Profit On Next-Generation Chips With Yield Management Breakthrough
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µLoop™ technology can save chipmakers millions of dollars by shaving weeks to months off traditional yield learning cycles

SAN JOSE, Calif., Oct. 8, 2001 - In a move that could greatly accelerate the pace of integrated circuit (IC) innovation, KLA-Tencor Corp. (Nasdaq: KLAC) today unveiled µLoop™ ("MicroLoop"), a revolutionary yield acceleration technology designed to help global chipmakers speed time to market and time to profit on their next-generation chips. Representing the industry's first inline, non-contact, electrical defect monitoring solution, KLA-Tencor's µLoop technology reduces the length of each electrical yield-learning cycle within the fab from as much as eight weeks down to as little as a few days. This enables chip manufacturers to substantially accelerate the production ramp of new IC technologies while, at the same time, increasing their baseline yields.

Company officials report that in addition to the obvious benefits associated with helping chipmakers meet their critical market windows by accelerating successful volume production on next-generation technologies, µLoop can be leveraged as a true profit center within the fab. It helps chipmakers capture the higher average selling prices (ASPs) associated with earlier deliveries on next-generation technologies. Even more importantly, it can help them save millions of dollars in lost opportunity costs, since a new fab can yield millions in added product revenue for each day saved in bringing it online, which can add up to $100s of millions annually, depending on fab setup.

At the heart of µLoop is KLA-Tencor's electron-beam (e-beam) scanning inspection and review technologies, which are used in tandem with patented test structures and defect and yield-analysis software, to quickly profile an entire wafer and pinpoint the exact location of electrical defects within a matter of minutes. This new approach to yield learning effectively brings electrical-test results inline for the front-end wafer fabrication process-closing the typical multi-week, or even multi-month, time gap between process development and electrical test.

According to Judy Shaw, process development program manager at Texas Instruments, one of several early customers for mLoop, "The value of inline detection of electrical defects is that it can reduce the time needed to ramp to yield. KLA-Tencor's mLoop technology gives chipmakers a way to more quickly reach desired yields and bring the latest technologies to market faster."

Enhancing Profitability Through Accelerated Yield Learning Independent market researcher, G. Dan Hutcheson, CEO of VLSI Research Inc., asserts that time to market is one of the biggest challenges chip manufacturers face today. "With product lifecycles dwindling, you can easily lose all profitability in a device if you miss the window by as little as a few months," stated Hutcheson. "This is all happening while the industry is grappling with the increased expense and manufacturing challenges of bringing new technologies like copper, sub-wavelength lithography and 300 mm into production. Faster yield learning is absolutely critical to enabling chip manufacturers to meet this accelerated technology roadmap, while still hitting their market windows. The industry has been waiting for a solution, like KLA-Tencor's µLoop technology, to tackle this increasingly critical yield-learning challenge. Bringing all of the advantages of electrical test inside the fab is a revolutionary concept in yield acceleration."

In a typical modern fab, dozens of yield-learning cycles are usually required in the course of developing and ramping a new technology into production with a single yield-learning cycle taking two to eight weeks to complete. During this yield-learning period, the vast majority of time is spent isolating the relatively small number of difficult-to-find electrical defects, as well as tracking down their cause. µmLoop allows the customer to spend more time on fixing problems than on isolating them.

"Reducing the time it takes to reach yield maturity is crucial to quickly recouping our investments in state-of-the-art semiconductor manufacturing tools," said Norm Armour, vice president and general manager at LSI Logic. " µLoop's shortening of yield-learning cycles from months to only a few days will have a tremendous impact on improving yields on our complex ASIC devices, providing LSI Logic customers with time-to-market advantages over competitors in global communications, consumer and storage markets."

µLoop: The Ingredients for Yield-Learning Success
µLoop's unmatched speed and accuracy in isolating the location of electrical defects is made possible by utilizing a combination of seamlessly-integrated, leading-edge capabilities, including:

  • patented test structures, which replicate customer-specific design rules and products
  • latest-generation eS20XP scanning e-beam inspection and eV300 review systems, which use a voltage contrast technique to identify and characterize electrical defects
  • advanced electrical defect and yield-analysis algorithms, which filter out non-yield relevant defects
  • industry-leading yield-acceleration expertise


  • To achieve µLoop's high speed and accuracy, the test structures are optimized to reliably simulate the patterns of a given process layer. Utilizing a patented, turnkey method for e-beam inspection with the special test structures, customers can quickly determine the exact location of electrical defects on a wafer within minutes. After the electrical defects are found, the eV300 review system uses special algorithms to re-identify and further characterize the defects. This information can then be overlaid with physical defect data obtained by optical inspection tools to determine the cause, step and location at which the electrical defects occurred. This enables customers to take a systematic approach to optimizing the electrical defect identification, root-cause analysis, and critical physical defect elimination processes.

    "Several years ago, KLA-Tencor anticipated that the day would come when this industry would require methods of detecting electrical defects inline," stated Ken Schroeder, president and CEO of KLA-Tencor. "We put together a team of experts dedicated to breaking down this yield-learning barrier. Their efforts, coupled with beta-site testing with several of our key customers, have resulted in what we believe to be the biggest revolution in yield acceleration in more than a decade. We've already received orders for mLoop from a number of major chipmakers, and we expect it to be in the majority of foundries and top semiconductor manufacturers during calendar 2002."

    µLoop is currently being tested and used by several major IC manufacturers. KLA-Tencor is now taking orders for µLoop, and is ready to deploy it at customer sites.

    A webcast presentation of µLoop will be available on KLA-Tencor's website beginning Monday, October 8, 2001 at 8:00 a.m. (EDT).

    About KLA-Tencor: KLA-Tencor is the world leader in yield management and process control solutions for semiconductor manufacturing and related industries. Headquartered in San Jose, Calif., the company has sales and service offices around the world. An S&P 500 company, KLA-Tencor is traded on the Nasdaq National Market under the symbol KLAC.

    Contact:
    Meggan Powers
    Director Corporate Communications

     

     

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